Conventionally, for demodulating modulated digital signals favorably in an electronic device such as a communication instrument and audiovisual equipment, a mutual conductance-capacitance filter (referred to as “gm-C filter” hereinafter) or the like has been adopted that adjusts the frequency characteristic with a high degree of accuracy and is ideal for implementing in semiconductor chip form. A gm-C filter generally incorporates a frequency adjusting circuit for adjusting the frequency characteristic to suppress its changes caused by manufacturing variation of semiconductor ICs and by changes in ambient temperature.
FIG. 9 illustrates an example of a receiver incorporating a conventional frequency adjusting circuit. Receiver 900 has filter 2 made of a gm-C filter. Filter 2 has input terminal 2a, output terminal 2b, and control terminal 2c. Input terminal 2a is supplied with an input signal before the frequency characteristic is adjusted. Output terminal 2b outputs an output signal after the frequency characteristic is adjusted. Control terminal 2c is supplied with a control voltage for adjusting the frequency characteristic from a frequency adjusting circuit to be described later.
Frequency adjusting circuit 8 has input terminal 9, reference filter 4, multiplication circuit 6, and low-pass filter 7. Input terminal 9 is supplied with reference clock signal 5 generated by a crystal oscillator (not illustrated) or the like.
Reference clock signal 5 fed into input terminal 9 is input to reference filter 4. A reference clock signal supplied from reference filter 4 is input to first input terminal 6a of multiplication circuit 6. Reference clock signal 5 is input as is to second input terminal 6b of multiplication circuit 6.
Multiplication circuit 6 multiplies two reference clock signals having passed through different signal paths, and compares both phases to output a voltage according to the phase difference. When a voltage supplied from multiplication circuit 6 is input to low-pass filter 7, the voltage is smoothed there to be output as a control voltage. Providing negative feedback to the control voltage having been output to reference filter 4 causes formation of a phase control loop, to control the frequency characteristic of reference filter 4 with high accuracy and reproducibility. Reference filter 4 is composed of a secondary low-pass filter. When the phase control loop is locked, reference clock signal 5 passing through is phase-shifted by 90 degrees in reference filter 4.
A control voltage supplied from low-pass filter 7 is input to control terminal 2c as a control voltage for filter 2. The frequency characteristic of an input signal fed into input terminal 2a of filter 2 is adjusted with a high degree of accuracy to extract an output signal supplied from output terminal 2b. The extracted output signal is used for a demodulation process in the receiver, for example.
Prior art documents relating to the present patent application include Japanese Patent Unexamined Publication No. 2003-60485.
In the above-mentioned conventional arrangement, however, frequency adjusting circuit 8, composed of reference filter 4, multiplication circuit 6, and low-pass filter 7, needs to be activated to adjust the frequency characteristic of filter 2. Accordingly, a symbol, namely a signal waveform of data composed of one or more bits, transmittable in one modulation, deteriorates due to changes in the frequency characteristic of filter 2.